Write Error (WER) is one of the most drawbacks of STT-MRAM based memories. This problem usually occurred because of thermal instability and process variation. Although some methods have been proposed for WER reduction, they often did not consider the thermal effect of MTJ and had significant overhead. Therefore, proposing a new method in a lower layer of abstraction with the minimum penalty is essential. In this regard, a write driver core has been proposed, which uses two distinct ways according to the state of writing data based on the thermal feature of MTJ cell and by Dual-Vdd method. Simulation results show 11. 38% write latency reduction without area and power penalty.

Recently integRated navigation systems are developed to use the advantages of both inertial navigation and global positioning system. In such integRated navigation systems when the GPS signal is missed، the system works based on inertial navigation data. In this condition the navigation Error increases progressive، especially when the INS sensors have low accuracy. To overcome this problem in most of the previous researches neural networks or support vector machines are applied to learn the navigation Errors when the auxiliary navigation signal exists. As soon as the auxiliary navigation signal is lost the output of trained NN’ s are summed with the output of inertial navigation system to remove the navigation Errors directly. In this paper a method is proposed to decrease the navigation Error Rate in presence of process and measurement noise. Actually here multilayer perceptron neural networks are trained to learn the navigation Errors when the auxiliary navigation signal is received، then the output of neural networks are applied to a Kalman filter which estimates the navigation Errors. Simulation is carried out on three different 6Dof paths. The results show that the proposed method is independent of flight path and has more effective performance in compare with mentioned methods.